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KVM: x86: nSVM: correctly virtualize LBR msrs when L2 is running
When L2 is running without LBR virtualization, we should ensure that L1's LBR msrs continue to update as usual. Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com> Message-Id: <20220322174050.241850-2-mlevitsk@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
committed by
Paolo Bonzini
parent
ea91559b00
commit
1d5a1b5860
@@ -536,6 +536,7 @@ void nested_vmcb02_compute_g_pat(struct vcpu_svm *svm)
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static void nested_vmcb02_prepare_save(struct vcpu_svm *svm, struct vmcb *vmcb12)
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{
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bool new_vmcb12 = false;
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struct vmcb *vmcb01 = svm->vmcb01.ptr;
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struct vmcb *vmcb02 = svm->nested.vmcb02.ptr;
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nested_vmcb02_compute_g_pat(svm);
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@@ -586,6 +587,9 @@ static void nested_vmcb02_prepare_save(struct vcpu_svm *svm, struct vmcb *vmcb12
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svm->vcpu.arch.dr6 = svm->nested.save.dr6 | DR6_ACTIVE_LOW;
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vmcb_mark_dirty(vmcb02, VMCB_DR);
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}
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if (unlikely(vmcb01->control.virt_ext & LBR_CTL_ENABLE_MASK))
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svm_copy_lbrs(vmcb02, vmcb01);
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}
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static void nested_vmcb02_prepare_control(struct vcpu_svm *svm)
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@@ -645,6 +649,9 @@ static void nested_vmcb02_prepare_control(struct vcpu_svm *svm)
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vmcb02->control.event_inj = svm->nested.ctl.event_inj;
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vmcb02->control.event_inj_err = svm->nested.ctl.event_inj_err;
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vmcb02->control.virt_ext = vmcb01->control.virt_ext &
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LBR_CTL_ENABLE_MASK;
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if (!nested_vmcb_needs_vls_intercept(svm))
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vmcb02->control.virt_ext |= VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK;
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@@ -912,6 +919,11 @@ int nested_svm_vmexit(struct vcpu_svm *svm)
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svm_switch_vmcb(svm, &svm->vmcb01);
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if (unlikely(vmcb01->control.virt_ext & LBR_CTL_ENABLE_MASK)) {
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svm_copy_lbrs(vmcb01, vmcb02);
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svm_update_lbrv(vcpu);
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}
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/*
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* On vmexit the GIF is set to false and
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* no event can be injected in L1.
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@@ -793,6 +793,17 @@ static void init_msrpm_offsets(void)
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}
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}
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void svm_copy_lbrs(struct vmcb *to_vmcb, struct vmcb *from_vmcb)
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{
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to_vmcb->save.dbgctl = from_vmcb->save.dbgctl;
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to_vmcb->save.br_from = from_vmcb->save.br_from;
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to_vmcb->save.br_to = from_vmcb->save.br_to;
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to_vmcb->save.last_excp_from = from_vmcb->save.last_excp_from;
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to_vmcb->save.last_excp_to = from_vmcb->save.last_excp_to;
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vmcb_mark_dirty(to_vmcb, VMCB_LBR);
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}
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static void svm_enable_lbrv(struct kvm_vcpu *vcpu)
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{
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struct vcpu_svm *svm = to_svm(vcpu);
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@@ -802,6 +813,10 @@ static void svm_enable_lbrv(struct kvm_vcpu *vcpu)
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set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTBRANCHTOIP, 1, 1);
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set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTFROMIP, 1, 1);
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set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTTOIP, 1, 1);
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/* Move the LBR msrs to the vmcb02 so that the guest can see them. */
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if (is_guest_mode(vcpu))
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svm_copy_lbrs(svm->vmcb, svm->vmcb01.ptr);
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}
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static void svm_disable_lbrv(struct kvm_vcpu *vcpu)
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@@ -813,6 +828,63 @@ static void svm_disable_lbrv(struct kvm_vcpu *vcpu)
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set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTBRANCHTOIP, 0, 0);
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set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTFROMIP, 0, 0);
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set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTTOIP, 0, 0);
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/*
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* Move the LBR msrs back to the vmcb01 to avoid copying them
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* on nested guest entries.
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*/
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if (is_guest_mode(vcpu))
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svm_copy_lbrs(svm->vmcb01.ptr, svm->vmcb);
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}
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static int svm_get_lbr_msr(struct vcpu_svm *svm, u32 index)
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{
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/*
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* If the LBR virtualization is disabled, the LBR msrs are always
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* kept in the vmcb01 to avoid copying them on nested guest entries.
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*
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* If nested, and the LBR virtualization is enabled/disabled, the msrs
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* are moved between the vmcb01 and vmcb02 as needed.
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*/
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struct vmcb *vmcb =
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(svm->vmcb->control.virt_ext & LBR_CTL_ENABLE_MASK) ?
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svm->vmcb : svm->vmcb01.ptr;
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switch (index) {
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case MSR_IA32_DEBUGCTLMSR:
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return vmcb->save.dbgctl;
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case MSR_IA32_LASTBRANCHFROMIP:
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return vmcb->save.br_from;
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case MSR_IA32_LASTBRANCHTOIP:
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return vmcb->save.br_to;
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case MSR_IA32_LASTINTFROMIP:
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return vmcb->save.last_excp_from;
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case MSR_IA32_LASTINTTOIP:
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return vmcb->save.last_excp_to;
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default:
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KVM_BUG(false, svm->vcpu.kvm,
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"%s: Unknown MSR 0x%x", __func__, index);
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return 0;
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}
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}
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void svm_update_lbrv(struct kvm_vcpu *vcpu)
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{
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struct vcpu_svm *svm = to_svm(vcpu);
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bool enable_lbrv = svm_get_lbr_msr(svm, MSR_IA32_DEBUGCTLMSR) &
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DEBUGCTLMSR_LBR;
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bool current_enable_lbrv = !!(svm->vmcb->control.virt_ext &
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LBR_CTL_ENABLE_MASK);
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if (enable_lbrv == current_enable_lbrv)
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return;
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if (enable_lbrv)
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svm_enable_lbrv(vcpu);
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else
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svm_disable_lbrv(vcpu);
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}
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void disable_nmi_singlestep(struct vcpu_svm *svm)
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@@ -2581,25 +2653,12 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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case MSR_TSC_AUX:
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msr_info->data = svm->tsc_aux;
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break;
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/*
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* Nobody will change the following 5 values in the VMCB so we can
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* safely return them on rdmsr. They will always be 0 until LBRV is
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* implemented.
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*/
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case MSR_IA32_DEBUGCTLMSR:
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msr_info->data = svm->vmcb->save.dbgctl;
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break;
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case MSR_IA32_LASTBRANCHFROMIP:
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msr_info->data = svm->vmcb->save.br_from;
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break;
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case MSR_IA32_LASTBRANCHTOIP:
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msr_info->data = svm->vmcb->save.br_to;
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break;
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case MSR_IA32_LASTINTFROMIP:
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msr_info->data = svm->vmcb->save.last_excp_from;
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break;
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case MSR_IA32_LASTINTTOIP:
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msr_info->data = svm->vmcb->save.last_excp_to;
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msr_info->data = svm_get_lbr_msr(svm, msr_info->index);
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break;
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case MSR_VM_HSAVE_PA:
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msr_info->data = svm->nested.hsave_msr;
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@@ -2845,12 +2904,13 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
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if (data & DEBUGCTL_RESERVED_BITS)
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return 1;
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if (svm->vmcb->control.virt_ext & LBR_CTL_ENABLE_MASK)
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svm->vmcb->save.dbgctl = data;
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vmcb_mark_dirty(svm->vmcb, VMCB_LBR);
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if (data & (1ULL<<0))
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svm_enable_lbrv(vcpu);
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else
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svm_disable_lbrv(vcpu);
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svm->vmcb01.ptr->save.dbgctl = data;
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svm_update_lbrv(vcpu);
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break;
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case MSR_VM_HSAVE_PA:
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/*
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@@ -492,6 +492,8 @@ u32 svm_msrpm_offset(u32 msr);
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u32 *svm_vcpu_alloc_msrpm(void);
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void svm_vcpu_init_msrpm(struct kvm_vcpu *vcpu, u32 *msrpm);
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void svm_vcpu_free_msrpm(u32 *msrpm);
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void svm_copy_lbrs(struct vmcb *to_vmcb, struct vmcb *from_vmcb);
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void svm_update_lbrv(struct kvm_vcpu *vcpu);
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int svm_set_efer(struct kvm_vcpu *vcpu, u64 efer);
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void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
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