Merge tag 'loongarch-fixes-6.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson

Pull LoongArch fixes from Huacai Chen:
 "Use UAPI types in ptrace UAPI header to fix nolibc ptrace.

  Fix CPU name display, NUMA node parsing, kexec/kdump, PCI init and BPF
  trampoline"

* tag 'loongarch-fixes-6.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson:
  LoongArch: BPF: Disable trampoline for kernel module function trace
  LoongArch: Don't panic if no valid cache info for PCI
  LoongArch: Mask all interrupts during kexec/kdump
  LoongArch: Fix NUMA node parsing with numa_memblks
  LoongArch: Consolidate CPU names in /proc/cpuinfo
  LoongArch: Use UAPI types in ptrace UAPI header
This commit is contained in:
Linus Torvalds
2025-11-21 11:16:14 -08:00
8 changed files with 79 additions and 91 deletions

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@@ -55,6 +55,27 @@ enum cpu_type_enum {
CPU_LAST CPU_LAST
}; };
static inline char *id_to_core_name(unsigned int id)
{
if ((id & PRID_COMP_MASK) != PRID_COMP_LOONGSON)
return "Unknown";
switch (id & PRID_SERIES_MASK) {
case PRID_SERIES_LA132:
return "LA132";
case PRID_SERIES_LA264:
return "LA264";
case PRID_SERIES_LA364:
return "LA364";
case PRID_SERIES_LA464:
return "LA464";
case PRID_SERIES_LA664:
return "LA664";
default:
return "Unknown";
}
}
#endif /* !__ASSEMBLER__ */ #endif /* !__ASSEMBLER__ */
/* /*

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@@ -10,10 +10,6 @@
#include <linux/types.h> #include <linux/types.h>
#ifndef __KERNEL__
#include <stdint.h>
#endif
/* /*
* For PTRACE_{POKE,PEEK}USR. 0 - 31 are GPRs, * For PTRACE_{POKE,PEEK}USR. 0 - 31 are GPRs,
* 32 is syscall's original ARG0, 33 is PC, 34 is BADVADDR. * 32 is syscall's original ARG0, 33 is PC, 34 is BADVADDR.
@@ -41,44 +37,44 @@ struct user_pt_regs {
} __attribute__((aligned(8))); } __attribute__((aligned(8)));
struct user_fp_state { struct user_fp_state {
uint64_t fpr[32]; __u64 fpr[32];
uint64_t fcc; __u64 fcc;
uint32_t fcsr; __u32 fcsr;
}; };
struct user_lsx_state { struct user_lsx_state {
/* 32 registers, 128 bits width per register. */ /* 32 registers, 128 bits width per register. */
uint64_t vregs[32*2]; __u64 vregs[32*2];
}; };
struct user_lasx_state { struct user_lasx_state {
/* 32 registers, 256 bits width per register. */ /* 32 registers, 256 bits width per register. */
uint64_t vregs[32*4]; __u64 vregs[32*4];
}; };
struct user_lbt_state { struct user_lbt_state {
uint64_t scr[4]; __u64 scr[4];
uint32_t eflags; __u32 eflags;
uint32_t ftop; __u32 ftop;
}; };
struct user_watch_state { struct user_watch_state {
uint64_t dbg_info; __u64 dbg_info;
struct { struct {
uint64_t addr; __u64 addr;
uint64_t mask; __u64 mask;
uint32_t ctrl; __u32 ctrl;
uint32_t pad; __u32 pad;
} dbg_regs[8]; } dbg_regs[8];
}; };
struct user_watch_state_v2 { struct user_watch_state_v2 {
uint64_t dbg_info; __u64 dbg_info;
struct { struct {
uint64_t addr; __u64 addr;
uint64_t mask; __u64 mask;
uint32_t ctrl; __u32 ctrl;
uint32_t pad; __u32 pad;
} dbg_regs[14]; } dbg_regs[14];
}; };

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@@ -277,7 +277,7 @@ static inline void cpu_probe_loongson(struct cpuinfo_loongarch *c, unsigned int
uint32_t config; uint32_t config;
uint64_t *vendor = (void *)(&cpu_full_name[VENDOR_OFFSET]); uint64_t *vendor = (void *)(&cpu_full_name[VENDOR_OFFSET]);
uint64_t *cpuname = (void *)(&cpu_full_name[CPUNAME_OFFSET]); uint64_t *cpuname = (void *)(&cpu_full_name[CPUNAME_OFFSET]);
const char *core_name = "Unknown"; const char *core_name = id_to_core_name(c->processor_id);
switch (BIT(fls(c->isa_level) - 1)) { switch (BIT(fls(c->isa_level) - 1)) {
case LOONGARCH_CPU_ISA_LA32R: case LOONGARCH_CPU_ISA_LA32R:
@@ -291,35 +291,23 @@ static inline void cpu_probe_loongson(struct cpuinfo_loongarch *c, unsigned int
break; break;
} }
switch (c->processor_id & PRID_SERIES_MASK) {
case PRID_SERIES_LA132:
core_name = "LA132";
break;
case PRID_SERIES_LA264:
core_name = "LA264";
break;
case PRID_SERIES_LA364:
core_name = "LA364";
break;
case PRID_SERIES_LA464:
core_name = "LA464";
break;
case PRID_SERIES_LA664:
core_name = "LA664";
break;
}
pr_info("%s Processor probed (%s Core)\n", __cpu_family[cpu], core_name); pr_info("%s Processor probed (%s Core)\n", __cpu_family[cpu], core_name);
if (!cpu_has_iocsr) if (!cpu_has_iocsr) {
__cpu_full_name[cpu] = "Unknown";
return; return;
}
if (!__cpu_full_name[cpu])
__cpu_full_name[cpu] = cpu_full_name;
*vendor = iocsr_read64(LOONGARCH_IOCSR_VENDOR); *vendor = iocsr_read64(LOONGARCH_IOCSR_VENDOR);
*cpuname = iocsr_read64(LOONGARCH_IOCSR_CPUNAME); *cpuname = iocsr_read64(LOONGARCH_IOCSR_CPUNAME);
if (!__cpu_full_name[cpu]) {
if (((char *)vendor)[0] == 0)
__cpu_full_name[cpu] = "Unknown";
else
__cpu_full_name[cpu] = cpu_full_name;
}
config = iocsr_read32(LOONGARCH_IOCSR_FEATURES); config = iocsr_read32(LOONGARCH_IOCSR_FEATURES);
if (config & IOCSRF_CSRIPI) if (config & IOCSRF_CSRIPI)
c->options |= LOONGARCH_CPU_CSRIPI; c->options |= LOONGARCH_CPU_CSRIPI;

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@@ -237,6 +237,7 @@ void machine_crash_shutdown(struct pt_regs *regs)
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
crash_smp_send_stop(); crash_smp_send_stop();
#endif #endif
machine_kexec_mask_interrupts();
cpumask_set_cpu(crashing_cpu, &cpus_in_crash); cpumask_set_cpu(crashing_cpu, &cpus_in_crash);
pr_info("Starting crashdump kernel...\n"); pr_info("Starting crashdump kernel...\n");
@@ -274,6 +275,7 @@ void machine_kexec(struct kimage *image)
/* We do not want to be bothered. */ /* We do not want to be bothered. */
local_irq_disable(); local_irq_disable();
machine_kexec_mask_interrupts();
pr_notice("EFI boot flag: 0x%lx\n", efi_boot); pr_notice("EFI boot flag: 0x%lx\n", efi_boot);
pr_notice("Command line addr: 0x%lx\n", cmdline_ptr); pr_notice("Command line addr: 0x%lx\n", cmdline_ptr);

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@@ -158,35 +158,9 @@ static void __init node_mem_init(unsigned int node)
#ifdef CONFIG_ACPI_NUMA #ifdef CONFIG_ACPI_NUMA
/* static unsigned long num_physpages;
* add_numamem_region
*
* Add a uasable memory region described by BIOS. The
* routine gets each intersection between BIOS's region
* and node's region, and adds them into node's memblock
* pool.
*
*/
static void __init add_numamem_region(u64 start, u64 end, u32 type)
{
u32 node = pa_to_nid(start);
u64 size = end - start;
static unsigned long num_physpages;
if (start >= end) { static void __init info_node_memblock(void)
pr_debug("Invalid region: %016llx-%016llx\n", start, end);
return;
}
num_physpages += (size >> PAGE_SHIFT);
pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx Bytes\n",
node, type, start, size);
pr_info(" start_pfn:0x%llx, end_pfn:0x%llx, num_physpages:0x%lx\n",
start >> PAGE_SHIFT, end >> PAGE_SHIFT, num_physpages);
memblock_set_node(start, size, &memblock.memory, node);
}
static void __init init_node_memblock(void)
{ {
u32 mem_type; u32 mem_type;
u64 mem_end, mem_start, mem_size; u64 mem_end, mem_start, mem_size;
@@ -206,12 +180,20 @@ static void __init init_node_memblock(void)
case EFI_BOOT_SERVICES_DATA: case EFI_BOOT_SERVICES_DATA:
case EFI_PERSISTENT_MEMORY: case EFI_PERSISTENT_MEMORY:
case EFI_CONVENTIONAL_MEMORY: case EFI_CONVENTIONAL_MEMORY:
add_numamem_region(mem_start, mem_end, mem_type); num_physpages += (mem_size >> PAGE_SHIFT);
pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx Bytes\n",
(u32)pa_to_nid(mem_start), mem_type, mem_start, mem_size);
pr_info(" start_pfn:0x%llx, end_pfn:0x%llx, num_physpages:0x%lx\n",
mem_start >> PAGE_SHIFT, mem_end >> PAGE_SHIFT, num_physpages);
break; break;
case EFI_PAL_CODE: case EFI_PAL_CODE:
case EFI_UNUSABLE_MEMORY: case EFI_UNUSABLE_MEMORY:
case EFI_ACPI_RECLAIM_MEMORY: case EFI_ACPI_RECLAIM_MEMORY:
add_numamem_region(mem_start, mem_end, mem_type); num_physpages += (mem_size >> PAGE_SHIFT);
pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx Bytes\n",
(u32)pa_to_nid(mem_start), mem_type, mem_start, mem_size);
pr_info(" start_pfn:0x%llx, end_pfn:0x%llx, num_physpages:0x%lx\n",
mem_start >> PAGE_SHIFT, mem_end >> PAGE_SHIFT, num_physpages);
fallthrough; fallthrough;
case EFI_RESERVED_TYPE: case EFI_RESERVED_TYPE:
case EFI_RUNTIME_SERVICES_CODE: case EFI_RUNTIME_SERVICES_CODE:
@@ -249,22 +231,16 @@ int __init init_numa_memory(void)
for (i = 0; i < NR_CPUS; i++) for (i = 0; i < NR_CPUS; i++)
set_cpuid_to_node(i, NUMA_NO_NODE); set_cpuid_to_node(i, NUMA_NO_NODE);
numa_reset_distance();
nodes_clear(numa_nodes_parsed);
nodes_clear(node_possible_map);
nodes_clear(node_online_map);
WARN_ON(memblock_clear_hotplug(0, PHYS_ADDR_MAX));
/* Parse SRAT and SLIT if provided by firmware. */ /* Parse SRAT and SLIT if provided by firmware. */
ret = acpi_disabled ? fake_numa_init() : acpi_numa_init(); if (!acpi_disabled)
ret = numa_memblks_init(acpi_numa_init, false);
else
ret = numa_memblks_init(fake_numa_init, false);
if (ret < 0) if (ret < 0)
return ret; return ret;
node_possible_map = numa_nodes_parsed; info_node_memblock();
if (WARN_ON(nodes_empty(node_possible_map)))
return -EINVAL;
init_node_memblock();
if (!memblock_validate_numa_coverage(SZ_1M)) if (!memblock_validate_numa_coverage(SZ_1M))
return -EINVAL; return -EINVAL;

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@@ -17,6 +17,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
{ {
unsigned long n = (unsigned long) v - 1; unsigned long n = (unsigned long) v - 1;
unsigned int isa = cpu_data[n].isa_level; unsigned int isa = cpu_data[n].isa_level;
unsigned int prid = cpu_data[n].processor_id;
unsigned int version = cpu_data[n].processor_id & 0xff; unsigned int version = cpu_data[n].processor_id & 0xff;
unsigned int fp_version = cpu_data[n].fpu_vers; unsigned int fp_version = cpu_data[n].fpu_vers;
@@ -37,6 +38,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
seq_printf(m, "global_id\t\t: %d\n", cpu_data[n].global_id); seq_printf(m, "global_id\t\t: %d\n", cpu_data[n].global_id);
seq_printf(m, "CPU Family\t\t: %s\n", __cpu_family[n]); seq_printf(m, "CPU Family\t\t: %s\n", __cpu_family[n]);
seq_printf(m, "Model Name\t\t: %s\n", __cpu_full_name[n]); seq_printf(m, "Model Name\t\t: %s\n", __cpu_full_name[n]);
seq_printf(m, "PRID\t\t\t: %s (%08x)\n", id_to_core_name(prid), prid);
seq_printf(m, "CPU Revision\t\t: 0x%02x\n", version); seq_printf(m, "CPU Revision\t\t: 0x%02x\n", version);
seq_printf(m, "FPU Revision\t\t: 0x%02x\n", fp_version); seq_printf(m, "FPU Revision\t\t: 0x%02x\n", fp_version);
seq_printf(m, "CPU MHz\t\t\t: %llu.%02llu\n", seq_printf(m, "CPU MHz\t\t\t: %llu.%02llu\n",

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@@ -1624,6 +1624,9 @@ static int __arch_prepare_bpf_trampoline(struct jit_ctx *ctx, struct bpf_tramp_i
/* Direct jump skips 5 NOP instructions */ /* Direct jump skips 5 NOP instructions */
else if (is_bpf_text_address((unsigned long)orig_call)) else if (is_bpf_text_address((unsigned long)orig_call))
orig_call += LOONGARCH_BPF_FENTRY_NBYTES; orig_call += LOONGARCH_BPF_FENTRY_NBYTES;
/* Module tracing not supported - cause kernel lockups */
else if (is_module_text_address((unsigned long)orig_call))
return -ENOTSUPP;
if (flags & BPF_TRAMP_F_CALL_ORIG) { if (flags & BPF_TRAMP_F_CALL_ORIG) {
move_addr(ctx, LOONGARCH_GPR_A0, (const u64)im); move_addr(ctx, LOONGARCH_GPR_A0, (const u64)im);

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@@ -50,11 +50,11 @@ static int __init pcibios_init(void)
*/ */
lsize = cpu_last_level_cache_line_size(); lsize = cpu_last_level_cache_line_size();
BUG_ON(!lsize); if (lsize) {
pci_dfl_cache_line_size = lsize >> 2;
pci_dfl_cache_line_size = lsize >> 2; pr_debug("PCI: pci_cache_line_size set to %d bytes\n", lsize);
}
pr_debug("PCI: pci_cache_line_size set to %d bytes\n", lsize);
return 0; return 0;
} }