RDMA/mlx5: Add DMAH object support

This patch introduces support for allocating and deallocating the DMAH
object.

Further details:
----------------
The DMAH API is exposed to upper layers only if the underlying device
supports TPH.

It uses the mlx5_core steering tag (ST) APIs to get a steering tag index
based on the provided input.

The obtained index is stored in the device-specific mlx5_dmah structure
for future use.

Upcoming patches in the series will integrate the allocated DMAH into
the memory region (MR) registration process.

Signed-off-by: Yishai Hadas <yishaih@nvidia.com>
Reviewed-by: Edward Srouji <edwards@nvidia.com>
Link: https://patch.msgid.link/778550776799d82edb4d05da249a1cff00160b50.1752752567.git.leon@kernel.org
Signed-off-by: Leon Romanovsky <leon@kernel.org>
This commit is contained in:
Yishai Hadas
2025-07-17 15:17:30 +03:00
committed by Leon Romanovsky
parent d83edab562
commit 3c81907075
4 changed files with 83 additions and 0 deletions

View File

@@ -8,6 +8,7 @@ mlx5_ib-y := ah.o \
cq.o \
data_direct.o \
dm.o \
dmah.o \
doorbell.o \
fs.o \
gsi.o \

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@@ -0,0 +1,54 @@
// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
/*
* Copyright (c) 2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved
*/
#include <rdma/uverbs_std_types.h>
#include <linux/pci-tph.h>
#include "dmah.h"
#define UVERBS_MODULE_NAME mlx5_ib
#include <rdma/uverbs_named_ioctl.h>
static int mlx5_ib_alloc_dmah(struct ib_dmah *ibdmah,
struct uverbs_attr_bundle *attrs)
{
struct mlx5_core_dev *mdev = to_mdev(ibdmah->device)->mdev;
struct mlx5_ib_dmah *dmah = to_mdmah(ibdmah);
u16 st_bits = BIT(IB_DMAH_CPU_ID_EXISTS) |
BIT(IB_DMAH_MEM_TYPE_EXISTS);
int err;
/* PH is a must for TPH following PCIe spec 6.2-1.0 */
if (!(ibdmah->valid_fields & BIT(IB_DMAH_PH_EXISTS)))
return -EINVAL;
/* ST is optional; however, partial data for it is not allowed */
if (ibdmah->valid_fields & st_bits) {
if ((ibdmah->valid_fields & st_bits) != st_bits)
return -EINVAL;
err = mlx5_st_alloc_index(mdev, ibdmah->mem_type,
ibdmah->cpu_id, &dmah->st_index);
if (err)
return err;
}
return 0;
}
static int mlx5_ib_dealloc_dmah(struct ib_dmah *ibdmah,
struct uverbs_attr_bundle *attrs)
{
struct mlx5_ib_dmah *dmah = to_mdmah(ibdmah);
struct mlx5_core_dev *mdev = to_mdev(ibdmah->device)->mdev;
if (ibdmah->valid_fields & BIT(IB_DMAH_CPU_ID_EXISTS))
return mlx5_st_dealloc_index(mdev, dmah->st_index);
return 0;
}
const struct ib_device_ops mlx5_ib_dev_dmah_ops = {
.alloc_dmah = mlx5_ib_alloc_dmah,
.dealloc_dmah = mlx5_ib_dealloc_dmah,
};

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@@ -0,0 +1,23 @@
/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
/*
* Copyright (c) 2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved
*/
#ifndef _MLX5_IB_DMAH_H
#define _MLX5_IB_DMAH_H
#include "mlx5_ib.h"
extern const struct ib_device_ops mlx5_ib_dev_dmah_ops;
struct mlx5_ib_dmah {
struct ib_dmah ibdmah;
u16 st_index;
};
static inline struct mlx5_ib_dmah *to_mdmah(struct ib_dmah *ibdmah)
{
return container_of(ibdmah, struct mlx5_ib_dmah, ibdmah);
}
#endif /* _MLX5_IB_DMAH_H */

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@@ -50,6 +50,7 @@
#include <rdma/ib_ucaps.h>
#include "macsec.h"
#include "data_direct.h"
#include "dmah.h"
#define UVERBS_MODULE_NAME mlx5_ib
#include <rdma/uverbs_named_ioctl.h>
@@ -4181,6 +4182,7 @@ static const struct ib_device_ops mlx5_ib_dev_ops = {
INIT_RDMA_OBJ_SIZE(ib_ah, mlx5_ib_ah, ibah),
INIT_RDMA_OBJ_SIZE(ib_counters, mlx5_ib_mcounters, ibcntrs),
INIT_RDMA_OBJ_SIZE(ib_cq, mlx5_ib_cq, ibcq),
INIT_RDMA_OBJ_SIZE(ib_dmah, mlx5_ib_dmah, ibdmah),
INIT_RDMA_OBJ_SIZE(ib_pd, mlx5_ib_pd, ibpd),
INIT_RDMA_OBJ_SIZE(ib_qp, mlx5_ib_qp, ibqp),
INIT_RDMA_OBJ_SIZE(ib_srq, mlx5_ib_srq, ibsrq),
@@ -4308,6 +4310,9 @@ static int mlx5_ib_stage_caps_init(struct mlx5_ib_dev *dev)
MLX5_GENERAL_OBJ_TYPES_CAP_SW_ICM)
ib_set_device_ops(&dev->ib_dev, &mlx5_ib_dev_dm_ops);
if (mdev->st)
ib_set_device_ops(&dev->ib_dev, &mlx5_ib_dev_dmah_ops);
ib_set_device_ops(&dev->ib_dev, &mlx5_ib_dev_ops);
if (IS_ENABLED(CONFIG_INFINIBAND_USER_ACCESS))