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objtool/LoongArch: Mark special atomic instruction as INSN_BUG type

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When compiling with LLVM and CONFIG_RUST is set, there exists the
following objtool warning:

  rust/compiler_builtins.o: warning: objtool: __rust__unordsf2(): unexpected end of section .text.unlikely.

objdump shows that the end of section .text.unlikely is an atomic
instruction:

  amswap.w        $zero, $ra, $zero

According to the LoongArch Reference Manual, if the amswap.w atomic
memory access instruction has the same register number as rd and rj,
the execution will trigger an Instruction Non-defined Exception, so
mark the above instruction as INSN_BUG type to fix the warning.

Cc: stable@vger.kernel.org
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
This commit is contained in:
Tiezhu Yang
2025-09-18 19:43:36 +08:00
committed by Huacai Chen
parent baad7830ee
commit 539d7344d4
2 changed files with 33 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
tools/arch/loongarch/include/asm/inst.h
View File

@@ -51,6 +51,10 @@ enum reg2i16_op {
bgeu_op = 0x1b, bgeu_op = 0x1b,
}; };
enum reg3_op {
amswapw_op = 0x70c0,
};
struct reg0i15_format { struct reg0i15_format {
unsigned int immediate : 15; unsigned int immediate : 15;
unsigned int opcode : 17; unsigned int opcode : 17;
@@ -96,6 +100,13 @@ struct reg2i16_format {
unsigned int opcode : 6; unsigned int opcode : 6;
}; };
struct reg3_format {
unsigned int rd : 5;
unsigned int rj : 5;
unsigned int rk : 5;
unsigned int opcode : 17;
};
union loongarch_instruction { union loongarch_instruction {
unsigned int word; unsigned int word;
struct reg0i15_format reg0i15_format; struct reg0i15_format reg0i15_format;
@@ -105,6 +116,7 @@ union loongarch_instruction {
struct reg2i12_format reg2i12_format; struct reg2i12_format reg2i12_format;
struct reg2i14_format reg2i14_format; struct reg2i14_format reg2i14_format;
struct reg2i16_format reg2i16_format; struct reg2i16_format reg2i16_format;
struct reg3_format reg3_format;
}; };
#define LOONGARCH_INSN_SIZE sizeof(union loongarch_instruction) #define LOONGARCH_INSN_SIZE sizeof(union loongarch_instruction)

21
tools/objtool/arch/loongarch/decode.c
View File

@@ -278,6 +278,25 @@ static bool decode_insn_reg2i16_fomat(union loongarch_instruction inst,
return true; return true;
} }
static bool decode_insn_reg3_fomat(union loongarch_instruction inst,
struct instruction *insn)
{
switch (inst.reg3_format.opcode) {
case amswapw_op:
if (inst.reg3_format.rd == LOONGARCH_GPR_ZERO &&
inst.reg3_format.rk == LOONGARCH_GPR_RA &&
inst.reg3_format.rj == LOONGARCH_GPR_ZERO) {
/* amswap.w $zero, $ra, $zero */
insn->type = INSN_BUG;
}
break;
default:
return false;
}
return true;
}
int arch_decode_instruction(struct objtool_file *file, const struct section *sec, int arch_decode_instruction(struct objtool_file *file, const struct section *sec,
unsigned long offset, unsigned int maxlen, unsigned long offset, unsigned int maxlen,
struct instruction *insn) struct instruction *insn)
@@ -309,6 +328,8 @@ int arch_decode_instruction(struct objtool_file *file, const struct section *sec
return 0; return 0;
if (decode_insn_reg2i16_fomat(inst, insn)) if (decode_insn_reg2i16_fomat(inst, insn))
return 0; return 0;
if (decode_insn_reg3_fomat(inst, insn))
return 0;
if (inst.word == 0) { if (inst.word == 0) {
/* andi $zero, $zero, 0x0 */ /* andi $zero, $zero, 0x0 */