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spi: imx: keep dma request disabled before dma transfer setup
Since sdma hardware configure postpone to transfer phase, have to disable dma request before dma transfer setup because there is a hardware limitation on sdma event enable(ENBLn) as below: "It is thus essential for the Arm platform to program them before any DMA request is triggered to the SDMA, otherwise an unpredictable combination of channels may be started." Signed-off-by: Carlos Song <carlos.song@nxp.com> Signed-off-by: Robin Gong <yibin.gong@nxp.com> Link: https://patch.msgid.link/20251024055320.408482-1-carlos.song@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@@ -519,9 +519,15 @@ static void mx51_ecspi_trigger(struct spi_imx_data *spi_imx)
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{
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u32 reg;
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reg = readl(spi_imx->base + MX51_ECSPI_CTRL);
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reg |= MX51_ECSPI_CTRL_XCH;
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writel(reg, spi_imx->base + MX51_ECSPI_CTRL);
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if (spi_imx->usedma) {
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reg = readl(spi_imx->base + MX51_ECSPI_DMA);
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reg |= MX51_ECSPI_DMA_TEDEN | MX51_ECSPI_DMA_RXDEN;
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writel(reg, spi_imx->base + MX51_ECSPI_DMA);
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} else {
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reg = readl(spi_imx->base + MX51_ECSPI_CTRL);
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reg |= MX51_ECSPI_CTRL_XCH;
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writel(reg, spi_imx->base + MX51_ECSPI_CTRL);
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}
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}
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static void mx51_ecspi_disable(struct spi_imx_data *spi_imx)
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@@ -759,7 +765,6 @@ static void mx51_setup_wml(struct spi_imx_data *spi_imx)
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writel(MX51_ECSPI_DMA_RX_WML(spi_imx->wml - 1) |
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MX51_ECSPI_DMA_TX_WML(tx_wml) |
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MX51_ECSPI_DMA_RXT_WML(spi_imx->wml) |
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MX51_ECSPI_DMA_TEDEN | MX51_ECSPI_DMA_RXDEN |
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MX51_ECSPI_DMA_RXTDEN, spi_imx->base + MX51_ECSPI_DMA);
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}
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@@ -1520,6 +1525,8 @@ static int spi_imx_dma_transfer(struct spi_imx_data *spi_imx,
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reinit_completion(&spi_imx->dma_tx_completion);
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dma_async_issue_pending(controller->dma_tx);
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spi_imx->devtype_data->trigger(spi_imx);
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transfer_timeout = spi_imx_calculate_timeout(spi_imx, transfer->len);
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/* Wait SDMA to finish the data transfer.*/
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