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Merge tag 'spi-fix-v6.18-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi fixes from Mark Brown: "A disappointingly large set of device specific fixes that have built up since I've been a bit tardy with sending a pull requests as people kept sending me new new fixes. The bcm63xx and lpspi issues could lead to corruption so the fixes are fairly important for the affected parts, the other issues should all be relatively minor" * tag 'spi-fix-v6.18-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: nxp-fspi: Propagate fwnode in ACPI case as well spi: tegra114: remove Kconfig dependency on TEGRA20_APB_DMA spi: amlogic-spifc-a1: Handle devm_pm_runtime_enable() errors spi: spi-fsl-lpspi: fix watermark truncation caused by type cast spi: cadence-quadspi: Fix cqspi_probe() error handling for runtime pm spi: bcm63xx: fix premature CS deassertion on RX-only transactions spi: spi-cadence-quadspi: Remove duplicate pm_runtime_put_autosuspend() call spi: spi-cadence-quadspi: Enable pm runtime earlier to avoid imbalance
This commit is contained in:
@@ -1181,10 +1181,10 @@ config SPI_TEGRA210_QUAD
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config SPI_TEGRA114
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tristate "NVIDIA Tegra114 SPI Controller"
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depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST
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depends on ARCH_TEGRA || COMPILE_TEST
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depends on RESET_CONTROLLER
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help
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SPI driver for NVIDIA Tegra114 SPI Controller interface. This controller
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SPI controller driver for NVIDIA Tegra114 and later SoCs. This controller
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is different than the older SoCs SPI controller and also register interface
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get changed with this controller.
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@@ -353,7 +353,9 @@ static int amlogic_spifc_a1_probe(struct platform_device *pdev)
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pm_runtime_set_autosuspend_delay(spifc->dev, 500);
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pm_runtime_use_autosuspend(spifc->dev);
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devm_pm_runtime_enable(spifc->dev);
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ret = devm_pm_runtime_enable(spifc->dev);
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if (ret)
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return ret;
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ctrl->num_chipselect = 1;
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ctrl->dev.of_node = pdev->dev.of_node;
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@@ -247,6 +247,20 @@ static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *first,
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if (t->rx_buf) {
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do_rx = true;
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/*
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* In certain hardware implementations, there appears to be a
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* hidden accumulator that tracks the number of bytes written into
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* the hardware FIFO, and this accumulator overrides the length in
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* the SPI_MSG_CTL register.
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*
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* Therefore, for read-only transfers, we need to write some dummy
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* value into the FIFO to keep the accumulator tracking the correct
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* length.
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*/
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if (!t->tx_buf)
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memset_io(bs->tx_io + len, 0xFF, t->len);
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/* prepend is half-duplex write only */
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if (t == first)
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prepend_len = 0;
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@@ -1981,6 +1981,13 @@ static int cqspi_probe(struct platform_device *pdev)
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cqspi->current_cs = -1;
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cqspi->sclk = 0;
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if (!(ddata && (ddata->quirks & CQSPI_DISABLE_RUNTIME_PM))) {
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pm_runtime_enable(dev);
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pm_runtime_set_autosuspend_delay(dev, CQSPI_AUTOSUSPEND_TIMEOUT);
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pm_runtime_use_autosuspend(dev);
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pm_runtime_get_noresume(dev);
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}
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ret = cqspi_setup_flash(cqspi);
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if (ret) {
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dev_err(dev, "failed to setup flash parameters %d\n", ret);
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@@ -1995,14 +2002,7 @@ static int cqspi_probe(struct platform_device *pdev)
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if (cqspi->use_direct_mode) {
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ret = cqspi_request_mmap_dma(cqspi);
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if (ret == -EPROBE_DEFER)
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goto probe_dma_failed;
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}
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if (!(ddata && (ddata->quirks & CQSPI_DISABLE_RUNTIME_PM))) {
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pm_runtime_enable(dev);
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pm_runtime_set_autosuspend_delay(dev, CQSPI_AUTOSUSPEND_TIMEOUT);
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pm_runtime_use_autosuspend(dev);
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pm_runtime_get_noresume(dev);
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goto probe_setup_failed;
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}
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ret = spi_register_controller(host);
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@@ -2012,7 +2012,6 @@ static int cqspi_probe(struct platform_device *pdev)
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}
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if (!(ddata && (ddata->quirks & CQSPI_DISABLE_RUNTIME_PM))) {
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pm_runtime_put_autosuspend(dev);
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pm_runtime_mark_last_busy(dev);
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pm_runtime_put_autosuspend(dev);
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}
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@@ -2021,7 +2020,6 @@ static int cqspi_probe(struct platform_device *pdev)
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probe_setup_failed:
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if (!(ddata && (ddata->quirks & CQSPI_DISABLE_RUNTIME_PM)))
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pm_runtime_disable(dev);
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probe_dma_failed:
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cqspi_controller_enable(cqspi, 0);
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probe_reset_failed:
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if (cqspi->is_jh7110)
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@@ -486,7 +486,13 @@ static int fsl_lpspi_setup_transfer(struct spi_controller *controller,
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fsl_lpspi->tx = fsl_lpspi_buf_tx_u32;
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}
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fsl_lpspi->watermark = min_t(typeof(fsl_lpspi->watermark),
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/*
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* t->len is 'unsigned' and txfifosize and watermrk is 'u8', force
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* type cast is inevitable. When len > 255, len will be truncated in min_t(),
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* it caused wrong watermark set. 'unsigned int' is as the designated type
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* for min_t() to avoid truncation.
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*/
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fsl_lpspi->watermark = min_t(unsigned int,
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fsl_lpspi->txfifosize,
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t->len);
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@@ -1287,7 +1287,7 @@ static int nxp_fspi_probe(struct platform_device *pdev)
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{
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struct spi_controller *ctlr;
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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struct fwnode_handle *fwnode = dev_fwnode(dev);
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struct resource *res;
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struct nxp_fspi *f;
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int ret, irq;
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@@ -1309,7 +1309,7 @@ static int nxp_fspi_probe(struct platform_device *pdev)
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platform_set_drvdata(pdev, f);
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/* find the resources - configuration register address space */
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if (is_acpi_node(dev_fwnode(f->dev)))
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if (is_acpi_node(fwnode))
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f->iobase = devm_platform_ioremap_resource(pdev, 0);
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else
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f->iobase = devm_platform_ioremap_resource_byname(pdev, "fspi_base");
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@@ -1317,7 +1317,7 @@ static int nxp_fspi_probe(struct platform_device *pdev)
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return PTR_ERR(f->iobase);
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/* find the resources - controller memory mapped space */
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if (is_acpi_node(dev_fwnode(f->dev)))
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if (is_acpi_node(fwnode))
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res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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else
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res = platform_get_resource_byname(pdev,
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@@ -1330,7 +1330,7 @@ static int nxp_fspi_probe(struct platform_device *pdev)
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f->memmap_phy_size = resource_size(res);
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/* find the clocks */
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if (dev_of_node(&pdev->dev)) {
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if (is_of_node(fwnode)) {
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f->clk_en = devm_clk_get(dev, "fspi_en");
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if (IS_ERR(f->clk_en))
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return PTR_ERR(f->clk_en);
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@@ -1383,7 +1383,7 @@ static int nxp_fspi_probe(struct platform_device *pdev)
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else
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ctlr->mem_caps = &nxp_fspi_mem_caps;
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ctlr->dev.of_node = np;
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device_set_node(&ctlr->dev, fwnode);
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ret = devm_add_action_or_reset(dev, nxp_fspi_cleanup, f);
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if (ret)
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