mirror of
https://github.com/torvalds/linux.git
synced 2025-12-01 07:26:02 +07:00
0810d5ad88
Using the DRM GPU scheduler infrastructure, with a scheduler for each core. Userspace can decide for a series of tasks to be executed sequentially in the same core, so SRAM locality can be taken advantage of. The job submission code was initially based on Panfrost. v2: - Remove hardcoded number of cores - Misc. style fixes (Jeffrey Hugo) - Repack IOCTL struct (Jeffrey Hugo) v3: - Adapt to a split of the register block in the DT bindings (Nicolas Frattaroli) - Make use of GPL-2.0-only for the copyright notice (Jeff Hugo) - Use drm_* logging functions (Thomas Zimmermann) - Rename reg i/o macros (Thomas Zimmermann) - Add padding to ioctls and check for zero (Jeff Hugo) - Improve error handling (Nicolas Frattaroli) v6: - Use mutexes guard (Markus Elfring) - Use u64_to_user_ptr (Jeff Hugo) - Drop rocket_fence (Rob Herring) v7: - Assign its own IOMMU domain to each client, for isolation (Daniel Stone and Robin Murphy) v8: - Use reset lines to reset the cores (Robin Murphy) - Use the macros to compute the values for the bitfields (Robin Murphy) - More descriptive name for the IRQ (Robin Murphy) - Simplify job interrupt handing (Robin Murphy) - Correctly acquire a reference to the IOMMU (Robin Murphy) - Specify the size of the embedded structs in the IOCTLs for future extensibility (Rob Herring) - Expose only 32 bits for the address of the regcmd BO (Robin Murphy) Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Jeff Hugo <jeff.hugo@oss.qualcomm.com> Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net> Signed-off-by: Jeff Hugo <jeff.hugo@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250721-6-10-rocket-v9-4-77ebd484941e@tomeuvizoso.net
65 lines
1.6 KiB
C
65 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
/* Copyright 2024-2025 Tomeu Vizoso <tomeu@tomeuvizoso.net> */
|
|
|
|
#ifndef __ROCKET_CORE_H__
|
|
#define __ROCKET_CORE_H__
|
|
|
|
#include <drm/gpu_scheduler.h>
|
|
#include <linux/clk.h>
|
|
#include <linux/io.h>
|
|
#include <linux/mutex_types.h>
|
|
#include <linux/reset.h>
|
|
|
|
#include "rocket_registers.h"
|
|
|
|
#define rocket_pc_readl(core, reg) \
|
|
readl((core)->pc_iomem + (REG_PC_##reg))
|
|
#define rocket_pc_writel(core, reg, value) \
|
|
writel(value, (core)->pc_iomem + (REG_PC_##reg))
|
|
|
|
#define rocket_cna_readl(core, reg) \
|
|
readl((core)->cna_iomem + (REG_CNA_##reg) - REG_CNA_S_STATUS)
|
|
#define rocket_cna_writel(core, reg, value) \
|
|
writel(value, (core)->cna_iomem + (REG_CNA_##reg) - REG_CNA_S_STATUS)
|
|
|
|
#define rocket_core_readl(core, reg) \
|
|
readl((core)->core_iomem + (REG_CORE_##reg) - REG_CORE_S_STATUS)
|
|
#define rocket_core_writel(core, reg, value) \
|
|
writel(value, (core)->core_iomem + (REG_CORE_##reg) - REG_CORE_S_STATUS)
|
|
|
|
struct rocket_core {
|
|
struct device *dev;
|
|
struct rocket_device *rdev;
|
|
unsigned int index;
|
|
|
|
int irq;
|
|
void __iomem *pc_iomem;
|
|
void __iomem *cna_iomem;
|
|
void __iomem *core_iomem;
|
|
struct clk_bulk_data clks[4];
|
|
struct reset_control_bulk_data resets[2];
|
|
|
|
struct iommu_group *iommu_group;
|
|
|
|
struct mutex job_lock;
|
|
struct rocket_job *in_flight_job;
|
|
|
|
spinlock_t fence_lock;
|
|
|
|
struct {
|
|
struct workqueue_struct *wq;
|
|
struct work_struct work;
|
|
atomic_t pending;
|
|
} reset;
|
|
|
|
struct drm_gpu_scheduler sched;
|
|
u64 fence_context;
|
|
u64 emit_seqno;
|
|
};
|
|
|
|
int rocket_core_init(struct rocket_core *core);
|
|
void rocket_core_fini(struct rocket_core *core);
|
|
void rocket_core_reset(struct rocket_core *core);
|
|
|
|
#endif
|